I. Field of the Invention
The present invention relates generally to programming flash memory and particularly to throughput adjustment.
II. Description of the Related Art
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Common uses for flash memory include portable computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code, system data such as a basic input/output system (BIOS), and other firmware can typically be stored in flash memory devices.
To encompass a large variety of applications, chip designers make some restrictive choices in the characteristics of the memory design. These characteristics include current consumption and programming speed or throughput. The designers typically have to trade off one for the other since the faster the programming, the higher the current consumption. Similarly, the larger the number of bits programmed in parallel, the higher the current consumption.
Battery powered devices would benefit more from low power consumption than higher throughput. Line powered devices would benefit more from programming throughput than low power consumption. In order to satisfy both markets, flash memory designers typically have to design multiple versions of a memory. This requires more time and money on the part of the designer. There is a resulting need in the art for a way to choose power consumption versus throughput in a flash memory device.